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2.4: Flynn Taxonomy- Structures and Multiprocessor Architectures

  • Page ID
    14843
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    Introduction

    This section introduces the learner to the designs of modern processors and their functionalities. Flynn Taxonomy is also discussed in the section.

    Activity Details

    Flynn’s taxonomy is a classification of computer architectures. i.e. is a classification of computer architectures. It has been used as a tool in design of modern processors and
    their functionalities. Flynn classification definitions are based upon the number of concurrent instruction (or control) streams and data streams available in the architecture. They are;-

    1. SISD (Single instruction stream, single data stream)

    A sequential computer which exploits no parallelism in either the instruction or data streams. Single control unit (CU) fetches single instruction stream (IS) from memory. The CU then generates appropriate control signals to direct single processing element (PE) to operate on single data stream (DS) i.e. one operation at a time.

    The traditional uniprocessor machines like a PC (currently manufactured PCs have multiple cores) or old mainframes.

    2. Single instruction stream, multiple data streams (SIMD)

    A computer which exploits multiple data streams against a single instruction stream to perform operations which may be naturally parallelized.

    For example, an array processor or graphics processing unit (GPU)

    3. Multiple instruction streams, single data stream (MISD)

    Multiple instructions operate on one data stream. Uncommon architecture which is generally used for fault tolerance. Heterogeneous systems operate on the same data stream and must agree on the result.

    Examples include the Space Shuttle flight control computer.

    4. Multiple instruction streams, multiple data streams (MIMD)

    Multiple autonomous processors simultaneously executing different instructions on different data. MIMD architectures include multi-core superscalar processors, and distributed systems, using either one shared memory space or a distributed memory space.

    Diagram comparing classifications

    These four architectures are shown below visually. Each processing unit (PU) is shown for a unicore or multi-core computer:

    Note

    As of 2006, all the top 10 and most of the TOP500 supercomputers are based on a MIMD architecture.

    Further divide the MIMD category into the two categories below, and even further subdivisions are sometimes considered.

    5. Single program, multiple data streams (SPMD)

    Multiple autonomous processors simultaneously executing the same program (but at independent points, rather than in the lockstep that SIMD imposes) on different data. Also termed single process, multiple data the use of this terminology for SPMD is technically incorrect, as SPMD is a parallel execution model and assumes multiple cooperating processes executing a program. SPMD is the most common style of parallel programming. The SPMD model and the term was proposed by Frederica Darema.

    Gregory F. Pfister was a manager of the RP3 project, and Darema was part of the RP3 team.

    6. Multiple programs, multiple data streams (MPMD)

    Multiple autonomous processors simultaneously operating at least 2 independent programs. Typically such systems pick one node to be the “host” (“the explicit host/node programming model”) or “manager” (the “Manager/Worker” strategy), which runs one program that farms out data to all the other nodes which all run a second program. Those other nodes then return their results directly to the manager. An example of this would be the Sony PlayStation 3 game console, with its SPU/PPU processor.

    Conclusion

    This sections introduced the learner the classification of computer architecture and has been used as a tool in design of modern processors and their functionalities

    Assessment

    Discuss the Multiple instruction streams data stream (MISD) architecture

    This implies that several instructions are operating on a single piece of data. The same data flows through a linear array of processors executing different instruction streams. This architecture is also known as systolic array for pipelined execution of specific algorithms.

    • Not much used in practice.

    This page titled 2.4: Flynn Taxonomy- Structures and Multiprocessor Architectures is shared under a CC BY-SA license and was authored, remixed, and/or curated by Harrison Njoroge (African Virtual University) .

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