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7.4: NAND Gate S-R Enabled Latch

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    • 4011 quad NAND gate (Radio Shack catalog # 276-2411)
    • Eight-position DIP switch (Radio Shack catalog # 275-1301)
    • Ten-segment bar graph LED (Radio Shack catalog # 276-081)
    • One 6 volt battery
    • Three 10 kΩ resistors
    • Two 470 Ω resistors

    Caution! The 4011 IC is CMOS, and therefore sensitive to static electricity!


    Lessons In Electric Circuits, Volume 4, chapter 3: “Logic Gates”

    Lessons In Electric Circuits, Volume 4, chapter 10: “Multivibrators”


    • Principle and function of an enabled latch circuit






    Although this circuit uses NAND gates instead of NOR gates, its behavior is identical to that of the NOR gate S-R latch (a “high” Set input drives Q “high,” and a “high” Reset input drives Q-not “high”), except for the presence of a third input: the Enable. The purpose of the Enable input is to enable or disable the Set and Reset inputs from having effect over the circuit’s output status. When the Enable input is “high,” the circuit acts just like the NOR gate S-R latch. When the Enable input is “low,” the Set and Reset inputs are disabled and have no effect whatsoever on the outputs, leaving the circuit in its latched state.

    This kind of latch circuit (also called a gated S-R latch), may be constructed from two NOR gates and two AND gates, but the NAND gate design is easier to build since it makes use of all four gates in a single integrated circuit.


    This page titled 7.4: NAND Gate S-R Enabled Latch is shared under a GNU Free Documentation License 1.3 license and was authored, remixed, and/or curated by Tony R. Kuphaldt (All About Circuits) via source content that was edited to the style and standards of the LibreTexts platform; a detailed edit history is available upon request.

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