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9.2: Half-Adder

  • Page ID
    953
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    As a first example of useful combinational logic, let’s build a device that can add two binary digits together. We can quickly calculate what the answers should be:

    ds.PNG

    So we well need two inputs (a and b) and two outputs. The low order output will be called Σ because it represents the sum, and the high order output will be called Cout because it represents the carry out. The truth table is

    14164.png

    Simplifying boolean equations or making some Karnaugh map will produce the same circuit shown below, but start by looking at the results. The Σ column is our familiar XOR gate, while the Cout column is the AND gate. This device is called a half-adder for reasons that will make sense in the next section.

    04454.png

    or in ladder logic

    04475.png


    This page titled 9.2: Half-Adder is shared under a GNU Free Documentation License 1.3 license and was authored, remixed, and/or curated by Tony R. Kuphaldt (All About Circuits) via source content that was edited to the style and standards of the LibreTexts platform; a detailed edit history is available upon request.