In this learning activity section, the learner will be able to learn languages that are used to describe the transfer of registration of internal operations in the computer.
Register Transfer language
A register transfer language is a notation used to describe the micr-operation transfers between registers. It is a system for expressing in symbolic form the micro-operation sequences among register that are used to implement machine-language instructions. For any function of the computer, the register transfer language can be used to describe the (sequence of) micro-operations
- Register transfer language
- A symbolic language
- A convenient tool for describing the internal organization of digital computers
- Can also be used to facilitate the design process of digital systems.
Registers and Register Transfer
- Registers are designated by capital letters, sometimes followed by numbers (e.g., A, R13, IR)
- Registers are denoted by capital letters and are sometimes followed by numerals, e.g.,
○ MAR – Memory Address Register (holds addresses for the memory unit)
○ PC – Program Counter (holds the next instruction’s address)
○ IR – Instruction Register (holds the instruction being executed)
○ R1 – Register 1 (a CPU register)
- We can indicate individual bits by placing them in parentheses, e.g., PC(8-15), R2(5), etc.
- Often the names indicate function:
○ Registers and their contents can be viewed and represented in various ways
○ A register can be viewed as a single entity
○ Registers may also be represented showing the bits of data they contain
- Designation of a register
○ a register
○ portion of a register
○ a bit of a register
Common ways of drawing the block diagram of a register
- Copying the contents of one register to another is a register transfer
- A register transfer is indicated as
R2 \(\neg\) R1
- In this case the contents of register R1 are copied (loaded) into register R2
- A simultaneous transfer of all bits from the source R1 to the destination register R2, during one clock pulse
- Note that this is a non-destructive; i.e. the contents of R1 are not altered by copying (loading) them to R2
- A register transfer such as
R3 \(\neg\) R5
- Implies that the digital system has
- the data lines from the source register (R5) to the destination register (R3)
- Parallel load in the destination register (R3)
- Control lines to perform the action
Register Transfer Language Instructions
- Register Transfer
R2 \(\neg\) R1
- Simultaneous Transfer
R2 \(\neg\) R1, R1 \(\neg\) R2
- Conditional Transfer (Control Function)
P: R2 \(\neg\) R1
If (P = 1) Then R2 \(\neg\) R1
- Conditional, Simultaneous Transfer
T: R2 \(\neg\) R1, R1 \(\neg\) R2
Basic Symbols For Register Transfer
|Letters (and numerals)||Denotes a register||MaR, R2|
|Parentheses ()||Denotes a part of register||R2(0-7), R2(L)|
|Arrow \(\leftarrow\)||Denotes Transfer of information||R2 \(\leftarrow\) R1|
|Comma,||Separates 2 micro-operations||R2 \(\leftarrow\) R1, R1 \(\leftarrow\) R1|
The learner was introduced to the register transfer language. In particular, how specific notations (symbols) are used to specify digital systems, rather than in words. Learners were also introduced to how registers can be viewed and represented.
1. Briefly explain what can be used to store one or more bits of data, also accept and/or transfer information serially?
Shift registers are group of flip-flops. each flip-flop in the register store one bit only i.e 1 or 0.
2. What addressing mode has its address part pointing to the address of actual data.
The addressing mode is direct addressing: In direct addressing operand is stored in memory and the memory address of the operand is specified in the instruction
3. Which addressing mode does not require the fetch operations?
Fetch operations are not required in immediate addressing. Because in immediate addressing the data is part of the instruction.
4. What addressing mode used an instruction of the form ADD X, Y? Absolute or direct addressing is used
5. Which is the register used as a working area in CPU?
An accumulator is register used in computer’s central processing unit in which intermediate arithmetic and logic results are stored.
6. What addressing mode is used in the instruction PUSH B?
In register addressing mode the operand is held in memory. The address of the operand location is held in a register which is specified in instruction.